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VSCLAB introduce hybrid temporal computing framework for power efficient AI computing

 VSCLAB is excited to share that we proposed   a new low-power computing paradigm called Hybrid Temporal Computing (HTC). In HTC, data for multiplication are encoded in a hybrid format combining temporal data and traditional bitstream data. The temporal data concept is inspired by recently proposed temporal computing (or race logic), where information is encoded as time delays or waveforms. Temporal computing can significantly reduce energy consumption, as it requires only a single switch to represent data transition but with limited applications due to waveform restrictions. 

The illustration below demonstrates how HTC handles multiplication and addition efficiently. Our initial findings indicate that HTC can achieves remarkable power savings compared to state-of-the-art stochastic computing methods, with small accuracy trade-offs in applications such as DCT/iDCT and digital filter accelerators.

This work will be published in coming  ASPDAC’25!

https://www.dropbox.com/scl/fi/mauappi87m5n0ufq22dyl/HTC_ASPDAC2025.pdf?rlkey=pv3el4244dc51ncp50ab6fido&e=1&dl=0

Please see the linked post here 

HTC example