Visiting Ph.D. student, Liang Chen's work on fast analytic solution for EM analysis for general multi-segment interconnect wires has been accepted by IEEE Transaction on VLSI. Congratulation on Liang! L. Chen, S. X.-D. Tan, Z. Sun, S. Peng, M. Tang and J. Mao, “Fast analytic electromigration analysis for general multi-segment interconnect wires”, IEEE Transactions on...

UCR is ranked number 5 in electronic design automation (EDA) related research in the latest CS ranking ahead Berkeley and MIT. Please see http://csrankings.org/#/index?da

GLU 3.0, the latest GPU-accelerated sparse parallel LU factorization solver, is released today. GLU 3.0 is a significant improvement over existing GLU 2.0 and GLU 1.0 in terms of performance and numerical stability. The new GLU solver will be beneficial for many high performance computing applications as sparse LU factorization is one of core computing...

Ph.D. student, Chase Cook's work on the GPU-based Ising computing to solve the graph max-cut problem, has been accepted for publication in Integration, The VLSI Journal. This is the first publication from VSCLAB on the Ising based computing based on GPGPU. It is an important mile stone at VSCLAB for GPU-based Ising computing for solving...

Undergraduate student researcher, Karina Rowe, won the prestigious BCOE's Alan Van Tran Student Award. Karina worked in the VSCLAB from Sept. 2018. She was supported by NSF REU fund for her research study at VSCLAB. She worked with Ph.D. student Chase Cook for the EM-based aging sensor design for hardware security and Ising computing for...

NSF funded a new collaborative research and student training program at VSCLAB at UC Riverside. The new project is tittled "IRES Track I: Development of Global Scientists and Engineers by Collaborative Research on Reliability-Aware IC Design", OISE-1854276 starting April 1st, 2019. See detailed at https://www.nsf.gov/awardsearch/showAward?AWD_ID=1854276&HistoricalAward... This new IRES Track I program is devoted to collaborative...

Ph.D. student, Sheriff Sadiqbatch's TCAD paper on the novel EM acceleration technique has been accepted. The work represents a novel reservior-sink based EM acceleration technique, which can allow the EM acceleration without leading to other long-term relibility effects such as TDDB, HCI etc. The paper informaiton is as follows: S. Sadiqbatcha, Z. Sun and S...

Ph.D. student, Zeyu Sun's paper on the EM saturatiom volume estmation for general interconnect wires has been accpeted by TVLSI: Z. Sun, S. Sadiqbatcha,H. Zhao, and S. X.-D. Tan, “Saturation volume estimation for multi-segment copper interconnect wire”, IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), (in press).

Ph.D. student, Han Zhou's paper on the EM-aware power grid optimization has been accepted by TVLSI. H. Zhou, Z. Sun, S.Sadiqbatcha, N. Chang and S. X.-D. Tan, “EM-aware and lifetime constrained optimization for multi-segment power grid networks”, IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), (10.1109/TVLSI.2018.2889079).

Ph.D. student Hengyang Zhao successfully defended his Ph.D. thesis titled "FEM Based Multiplysics Analysis of Electromigration Voiding Problems in Nanometer Integrated Circuits". He will join Google as software engineer after graduation. Congratulation on Hengyang and we wish him the best in his feature endeavor.

Dr. Sheldon Tan presented our recent works on Electromigrstion accelration in the 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). This paper has been nominated for Honorable mention Best Paper Award. S. Sadiqbatcha, C. Cook, Z. Sun and S. X. -. Tan, "Accelerating Electromigration Wear-Out Effects...

RIVERSIDE, Calif. ( www.ucr.edu)— A University of California, Riverside engineer builds electronic circuits just to break them as quickly as possible. A research team led by Sheldon Tan, a professor of electrical and computer engineering in the Bourns College of Engineering, has developed a new way to test the reliability of integrated circuits, such as...

Professor Sheldon Tan (PI) received a three-year grant (CCF-1816361) from National Science for developing new optimization and runtime management techniques for more reliable and robust nanometer ICs. The project is titled “SHF:Small: EM-Aware Physical Design and Run-Time Optimization for sub-10nm 2D and 3D Integrated Circuits”. This is a three year project starting August 1st, 2018...

Mr. Michael McComas (second right) of BAE System visited VSCLAB. Mr. McComas is the Director, External Innovation Sourcing for BAE Systems – Electronic Systems. Mr. Mike Allen (center), who is the Associate Director of Corporation & Strategic Partnerships at UCR also visited VSCLAB. Ph.D. students, Zeyu Sun and Sheriff Sadiqbatcha introduced the research works at...

Ph.D. student, Sheriff Sadiqbatcha, has received the Richard Newton Young Student Fellow Award from 55th Design Automation Conference (DAC), which is a prestigious award for junior Ph.D. students who studied in the electronic design automation (EDA) and embedded system design areas. A PhD student, Sheriff Sadiqbatcha will get supports from the award for their travel...

Many VSCLAB Ph.D. students will go for summer interns for the coming 2018. Chase Cook will go to Intel Corp in Hillsboro, OR; Han Zhou and Zeyu Sun will go Synopsys, Moutain View, CA; Shaoyi Peng will go to Cadence, San jose, CA. Congratulation on all of them. Wish them have a successful interns in...

Dr. Tan was just elected as the Technical Program Committte (TPC) Chair for IEEE/ACM Asian South Pacific Design Automation Conference (ASPDAC) in 2021, which is to be held in Tokyo, Japan. This is an important position as ASPDAC is one of primary conferences in VLSI design and computed aided design area.

Dr. Tan's team published an invited paper in ASPDAC 18 on the fast EM acceleration technique. In this paper, Dr. Tan's team proposed a novel reservoir-based EM acceleration technique, which can lead to very fast EM failure without using traditional temperature or current based acceleration technique. As a result, the new technique can void the...

Our recent works on fast EM analysis using Krylov subspace has been accepted to IEEE Transactions on Very Large Scale Integreation Systems (TVLSI) as follows: C.Cook, Z.Sun, E.Demircan, M. D. Shroff, , S. X.-D. Tan, "Fast Electromigration Stress Evolution Analysis for Interconnect Trees using Krylov Subspace Method" IEEE Transactions on Very Large Scale Integreation Systems...

Our recent works on voltage based EM modeling has been accepted to IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) as follows: Z.Sun, E.Demircan, M. D. Shroff, C.Cook, S. X.-D. Tan, "Fast Electromigration Immortality Analysis for Multi-Segment Copper Interconnect Wires" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), (in...